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#include "at32f403a_407_board.h"
#include "at32f403a_407_clock.h"
int main(void)
{
system_clock_config();
/* peripheral clocks configuration */
crm_configuration();
/* gpio configuration */
gpio_configuration();
/* tmr base configuration */
tmr_base_init(TMR2, 319, 0);
tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
tmr_base_init(TMR3, 9, 0);
tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
tmr_base_init(TMR4, 4, 0);
tmr_cnt_dir_set(TMR4, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR4, TMR_CLOCK_DIV1);
/* output compare toggle mode configuration: channel1 */
tmr_output_default_para_init(&tmr_oc_init_structure);
tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
tmr_oc_init_structure.oc_idle_state = FALSE;
tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_oc_init_structure.oc_output_state = TRUE;
tmr_output_channel_config(TMR2, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
tmr_channel_value_set(TMR2, TMR_SELECT_CHANNEL_1, 64);
tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, 3);
tmr_output_channel_config(TMR4, TMR_SELECT_CHANNEL_1, &tmr_oc_init_structure);
tmr_channel_value_set(TMR4, TMR_SELECT_CHANNEL_1, 3);
/* primary mode selection: TMR2 */
tmr_sub_sync_mode_set(TMR2, TRUE);
tmr_primary_mode_select(TMR2, TMR_PRIMARY_SEL_OVERFLOW);
/* subordinate mode selection: TMR3 */
tmr_sub_mode_select(TMR3, TMR_SUB_HANG_MODE);
tmr_trigger_input_select(TMR3, TMR_SUB_INPUT_SEL_IS1);
/* subordinate mode selection: TMR4 */
tmr_sub_mode_select(TMR4, TMR_SUB_HANG_MODE);
tmr_trigger_input_select(TMR4, TMR_SUB_INPUT_SEL_IS1);
/* tmr enable counter */
tmr_counter_enable(TMR2, TRUE);
tmr_counter_enable(TMR3, TRUE);
tmr_counter_enable(TMR4, TRUE);
while(1)
{
}
}
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